RISC-V CPU IP Solution

N100
Series 32-Bit High Performance Processor
With extreme low area, N100 is a 32b RISC-V processor designed specifically for low power application. N100 aims for cost sensitive application including IoT, MCU, Sensor.
N100 Core
WFI
WFE
Timer
Debug
Machine mode
IRQC
N100 uCore
MUL
DIV
AHB-Lite
ZC
JTAG
2-Wires JTAG
  • Ultra-LowPower
  • RV32I/EMC/Zc
  • 2 Stage Pipeline
  • Machine-Mode
  • AHB-Lite
  • Multiplier-divider
  • RISC-V Standard Debug
  • JTAG & cJTAG
  • Low Latency Interrupt
  • Full Development Toolkit
  • Support RV32I/EMC/Zc ISA.
  • 2-stage pipeline, best micro archtecture for the performace and cost.
  • Configurable single cycle and multiple cycle Multiplier
  • 32 Bits AHB-Lite system bus
  • Configurable Divider
  • Machine mode
  • Configurable IRQC
  • Full Standard Debug Function with JTAG/cJTAG port.
  • Full Standard RISC-V Toolchain, and Linux/Windows IDE supported
100 Series Performance and Configurability
Nuclei CPU IP N100
Dhrystone(DMIPS/MHz) 1.09(Ground Rule)
CoreMark(CoreMarks/MHz) 2.96
Pipeline Stages 2
Issue Single-Issue
Hardware Multiplier Configurable
Hardware Divider Configurable
RISC-V ZC Extension Configurable
Partners(排名不分先后)

RISC-V Foundation

SICA

China RISC-V Industry Alliance

China RISC-V Alliance

武汉光电工业技术研究院

HBSIA

CBSIA

SZICC

Amlogic

VeriSilicon

LAUTERBACH

TencentOS Tiny

OpenHarmony

PlatformIO

SEGGER

TrustKernel

XIAOMI

taolink-tech

GeoforceChip

ChipIntelli

Witmem

Fisilink

TIH Microelectronics

XinSheng Tech

GigaDevice

ASR

AnLogic

TusStar

Mocro & Nano Institute

RT-Thread

OPEN AI LAB

IAR

HUST

SJTU

WHU

HBUT

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