RISC-V IP SOLUTION_Nuclei-Best RISC-V Processor IP

Nuclei RISC-V Processores Can Meet the Diverse Need

N Class

32-bit Architecture

MCU, Edge Computing, AIoT, Security

NX Class

64-bit Architecture

Storage,AR/VR,AI

UX Class

64-bit Architecture

Linux,Data center, Network, Baseband

Configurations

Comparisons to ARM Cortex M7 ARM Cortex R4 ARM Cortex R5 ARM Cortex R7

NX900

NX900
MC

Comparisons to ARM Cortex M7 ARM Cortex R7 ARM Cortex R8

UX900

UX900
MC

Comparisons to ARM Cortex A35 ARM Cortex A53 ARM Cortex A55

600 Series

6 Stages Single-issue

N600

Comparisons to ARM Cortex R4 ARM Cortex R5

NX600

Comparisons to ARM Cortex R4 ARM Cortex R5

UX600

Comparisons to ARM Cortex A5 ARM Cortex A7

300 Series

3 Stages Single-issue

N300

Comparisons to ARM Cortex M33 ARM Cortex M4 ARM Cortex M4f

200 Series

2 Stages Single-issue

N200

Comparisons to ARM Cortex M0 ARM Cortex M0+ ARM Cortex M3 ARM Cortex M23

200 Series

2 Stages Single-issue

N200

Comparisons to ARM Cortex M0 ARM Cortex M0+ ARM Cortex M3 ARM Cortex M23

300 Series

3 Stages Single-issue

N300

Comparisons to ARM Cortex M33 ARM Cortex M4 ARM Cortex M4f

600 Series

6 Stages Single-issue

N600

Comparisons to ARM Cortex R4 ARM Cortex R5

NX600

Comparisons to ARM Cortex R4 ARM Cortex R5

UX600

Comparisons to ARM Cortex A7 ARM Cortex A5

Comparisons to ARM Cortex M7 ARM Cortex R4 ARM Cortex R5 ARM Cortex R7

NX900

NX900
MC

Comparisons to ARM Cortex M7 ARM Cortex R7 ARM Cortex R8

UX900

UX900
MC

Comparisons to ARM Cortex A35 ARM Cortex A53 ARM Cortex A55 ARM Cortex A9

Safety

Security

Extension

DSP

SP/DP FPU

Vector

Rich Configurability

Adapt the Core to the System
Incorporate Only Needed Features

Robust Coding Format

Verilog based
Friendly for debug, PPA optimization

Excellent Scalability

RISC-V B/K/P/V -extensions
User-defined Instruction Extension

Conprehensive Information Security Solution

TEE supported
Physical security package

Sound Safety Functional Solution

ASIL-B & ASIL-D supported
Function safety Package

Flexible Business Model and Technical Support

CPU subsystem available
Local support with fast response

Partners（排名不分先后）

RISC-V CPU IP Solution

RISC-V Foundation

SICA

China RISC-V Industry Alliance

China RISC-V Alliance

武汉光电工业技术研究院

HBSIA

CBSIA

Amlogic

VeriSilicon

LAUTERBACH

TencentOS Tiny

OpenHarmony

PlatformIO

SEGGER

TrustKernel

XIAOMI

RT-Thread

OPEN AI LAB

AnLogic

ASR

GigaDevice

XinSheng Tech

TIH Microelectronics

FisiLink

Witeme

ChipIntelli

Geoforce Chip

TAOLINK TECHNOLOGIES

Huazhong University of Science and Technology

Shanghai Jiao Tong University

Wuhan University

Hubei University of Technology

Contact Us

Email

contact@nucleisys.com

Message Consultation

Sales Campus

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