RISC-V CPU IP Solution

NA900
32-Bit Automotive Processor
NA900 series processor is the 1st ISO26262 ASIL-B/D Product Certified RISC-V CPU IP,Nuclei self-developed STL supports multiple ASIL-B automotive use cases.
NA900 Core Complex
Debug
NA900 Core
NMI
ECLIC
Timer
WFI/WFE
FPU
DSP
900 uCore
MUL/DIV
ICache
DCache
PMP
ILM
DLM
AHB-Lite
AXI
  • Real-time Feature
  • RV32IMACFDPB
  • 9 Stage Pipeline Dual-issue
  • I/D Cache
  • Security(PMP, TEE)
  • AXI System Bus
  • RISC-V Standard Debug
  • JTAG & cJTAG
  • Low Latency Interrupt
  • Full Dev Kit & SDK
  • RISC-V RV32 IMACFDPVBZfh ISA supported
  • Dual Issue, in-order 9 stage Harvard Pipeline
  • 64-bit AXI System Bus, Configurable 64-bit AXI slave port
  • Double, Single and Half-Precision floating point
  • Configurable SIMD DSP Extension
  • Configurable Instruction and Data Cache
  • Configurable ILM (Instruction Local Memory) with ECC
  • Configurable DLM (Data Local Memory) with ECC
  • PMP supported to meet the system security needs
  • Full Standard Debug Function with JTAG and cJTAG Port
  • Full Standard RISC-V Toolchain, and Linux\Windows IDE supported
Download NA900 Product Brief
1st ISO26262 ASIL-B/D Product Certified RISC-V CPU IP
NA900D Serires
  • Systematic Capability:ASIL D
  • Hardware Safe ty Integrity: ASIL D in DCLS mode
NA900B Serires
  • Systematic Capability:ASIL D
  • Hardware Safe ty Integrity: ASIL B
  • Nuclei self developed Softwate Test Library for ASIL B application
  • Fault Injection simulation FMEDA report for configurable design
  • ASIL B support fot both split mode and singlecore mode
  • Safety enhanced hardware for trade-off between diagnostic coverage and hardware cost
Download NA900 Certificate
Summary for Nuclei Automotive FuSa Solutions
  • ASIL-B & ASIL-D solutions are both available for NA300 & NA900 series
  • Rich configurations to fit variable automotive SoC requirements
  • Comprehensive safety package
    • Adaptable Safety Manual
    • Adaptable Safety Analysis Report
    • Supporting Evidence
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